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semiconductors

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Dwarkesh Podcast 2026-10-22-1

What will computer chips look like in 2045?

Intel's Ranade says process technology is within a few percent of TSMC, and the gap that matters is scale and on-time ramps. ASML builds fewer than 100 EUV machines a year, leading-edge output could reach about 2x with existing tool supply rather than 10x, and a tool ordered today lands in 2028. That timeline means 2030 supply is largely being decided by orders placed now, which is the constraint the Empires of AI piece and the CME contracts both sit on top of.

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dwarkeshintelsemiconductorstsmcasmlcompute-supply-chaininfrastructure-bottleneckai-capex-cyclememory-marketpodcastai-capital-cycle
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AI infrastructure capexMarket concentrationHardware fragmentationVertical IntegrationSupply Constraint Economics
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infrastructure-bottleneckai-capex-cycleai-capital-cycle
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2026-03-18-12026-04-21-22026-03-28-32026-03-17-32026-10-16-32026-04-14-12026-03-31-m22026-10-16-12026-10-16-w2
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The Wall Street Journal 2026-10-16-3

AI Chips’ New Secret Sauce Is Packaging

The WSJ finds AI chip gains now come more from packaging than from transistor shrinking, and packaging capacity has bottlenecked Nvidia's sales. TSMC converted old fabs and expanded capacity several times over, and is pulling packaging in-house from what used to be a low-margin outsourced business. That is the physical ceiling under Jensen's supply story, and it limits how many leases Nvidia can usefully stand behind.

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wsjsemiconductorscompute-supply-chainhbmtsmcnvidiaai-infrastructureai-capital-cyclesupply-chain
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Hardware fragmentationVertical IntegrationAI Infrastructure InvestmentSupply Constraint Economics
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ai-capital-cycle
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2026-03-17-32026-03-18-12026-03-19-12026-04-14-12026-04-11-12026-03-10-12026-03-11-12026-04-21-2
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Dwarkesh Podcast 2026-05-28-1

Reiner Pope on Chip Design from the Bottom Up: Data Movement Dominates Arithmetic 7-to-1, B300's FP4-FP8 Gap as First Crack in NVIDIA's FLOPS Marketing, Splittable Systolic Arrays as Maddox's Architectural Wedge

NVIDIA's B300 datasheet ships FP4 at 3x FP8 speed where precision-scaling theory says 4x — the first public number that doesn't square with marketed FLOPS as a benchmark. The durable accelerator moat is array geometry plus memory hierarchy, not transistor budget: that's why Maddox, Majestic, Groq, and Cerebras all exist as funded alternatives, each architecture matched to a workload profile the general-purpose chip handles inefficiently. By 2027, enterprise procurement moves from NVIDIA versus not to which architectural bet fits the inference batch size.

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ai-economicsai-infrastructuresemiconductornvidiatpuinference-economicshardware-fragmentationcustom-chipsai-1.0-defensibilitydwarkeshsemiconductorsgpu-infrastructurecompute-supply-chainharness-as-moatagentic-ai-viabilityedge-aipodcast
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Reiner PopeMaddoxNVIDIATPUDwarkesh PatelCerebrasGroqMajestic LabsAMDSynopsys
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ai-1.0-defensibilityinference-economicshardware-fragmentation
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2026-03-10-12026-03-17-32026-03-17-22026-03-14-12026-03-24-22026-04-14-12026-03-21-32026-04-09-12026-04-21-32026-05-01-12026-05-25-12026-05-26-3
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CNBC 2026-03-17-1

Nvidia GTC Preview: Why the CPU is Taking Center Stage

Agentic AI creates genuine CPU demand expansion: orchestration is sequential, CPU-bound work that GPUs can't do. Nvidia's "standalone CPU" story is really a coprocessor story, though; Grace and Vera are optimized to feed GPUs, not compete for general-purpose workloads at 6.2% share and 72 cores vs. 128. The higher-signal play is NVLink licensing, where Nvidia captures networking value regardless of whose CPU fills the socket.

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ai-infrastructuresemiconductorsagentic-aisupply-chainsplatform-strategy
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NvidiaAMDIntelMetaArm
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ai-economicsagentic-ai-viability
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2026-03-16-22026-03-14-12026-03-15-12026-03-14-32026-03-16-32026-03-10-12026-03-14-2
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Wall Street Journal 2026-03-17-2

Can Nvidia's Dominance Survive the Sea Change Under Way in AI Computing?

Nvidia's 73% GPU margins are structurally incompatible with an efficiency-first inference economy, but the displacement story isn't "Cerebras replaces Nvidia." Inference is heterogeneous, and Nvidia is racing to sell all three form factors: GPU for training, CPU for orchestration, LPU for inference throughput. The transition from monopolist-margin chipmaker to platform-margin integrator is the real architectural bet at GTC this year.

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ai-infrastructuresemiconductorsmargin-compressioninference-economicscompetitive-dynamics
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NvidiaGroqCerebrasOpenAIJensen HuangAWS
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ai-economicsmulti-model-strategyagentic-ai-viability
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2026-03-10-12026-03-14-12026-03-16-32026-03-16-22026-03-15-12026-03-14-32026-03-12-32026-03-14-22026-03-13-w32026-03-08-1
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